TSMC and GlobalFoundries have struck an interposer agreement that redraws the US AI supply chain, from CoWoS advanced packaging through to high-bandwidth memory (HBM), DigiTimes reports.

The deal centers on interposers — the silicon bridges that connect AI accelerators to HBM stacks inside CoWoS-class packages. Until now, TSMC has built the entire CoWoS pipeline in-house at its Taiwan facilities. Bringing GlobalFoundries into the interposer layer moves a critical component of that chain onto US-fabricated silicon for the first time.

What does the deal cover?

The agreement spans two linked segments of the AI hardware stack:

• Interposers: the passive silicon substrates that carry signals between a GPU or AI accelerator die and the HBM modules surrounding it.
• CoWoS: TSMC's chip-on-wafer-on-substrate packaging technology, the dominant assembly method for AI accelerators and the industry's most capacity-constrained bottleneck.
• HBM: the memory that interposers connect to; interposer supply directly gates how much HBM can be integrated per package.

Interposers are less complex to fabricate than logic dies, which makes them a plausible transfer product for a mature-node manufacturer such as GlobalFoundries.

Why does it matter for the US supply chain?

CoWoS capacity has been the binding constraint on AI chip output for multiple quarters. Nvidia, AMD and other accelerator vendors have queued for packaging slots, and TSMC has repeatedly expanded CoWoS output to keep pace.

Adding a US-based interposer supplier changes that equation in three ways:

• It adds packaging-chain capacity outside Taiwan's fabrication footprint.
• It gives US AI chip programs a domestic link in the CoWoS pipeline.
• It couples GlobalFoundries' US fabs to the HBM integration chain, since every HBM stack in a CoWoS package sits on an interposer.

In short: whoever controls interposer output controls how much HBM reaches finished AI silicon.

Who gains?

GlobalFoundries gains entry into the highest-demand segment of the semiconductor market without competing on leading-edge logic nodes. TSMC gains a second interposer source as it works to relieve CoWoS constraints. AI chip designers gain a more resilient packaging chain.

The reshaping is structural rather than incremental: an interposer deal links one US foundry directly to the packaging layer where AI supply has been tightest.