Samsung will present its evolving HBM base die design at Hot Chips 2026, according to the conference announcement surfaced by ServeTheHome.

The session places Samsung inside the annual symposium's processor and memory program, where vendors disclose microarchitecture details that rarely appear in product datasheets. High-bandwidth memory depends on the base die for signal routing, through-silicon via management and thermal transfer between the DRAM stack and the package substrate.

What does the base die control in HBM?

The base die sits beneath the stacked DRAM layers and carries the logic interface that connects the memory stack to the host processor. Any change to its design affects bandwidth, power draw and stack height limits for the modules that GPU and AI accelerator vendors buy.

Samsung competes with SK hynix and Micron in the HBM segment, and each supplier treats base die process choice — whether to use a leading-edge logic node or a mature process — as a cost and performance lever.

Why does a Hot Chips slot matter?

Hot Chips presentations historically disclose roadmaps before product shipments. A Samsung base die session signals the company intends to publish technical detail on how it plans to advance HBM integration for coming accelerator generations.

ServeTheHome, which tracks server silicon and memory closely, listed the talk without additional specification data. Die sizes, node choices and bandwidth targets remain unconfirmed until Samsung delivers the presentation.

Samsung has not yet published the full paper or slides. Until the conference, buyers and competitors can only note the slot itself.

The takeaway: Samsung has booked a Hot Chips 2026 session on its HBM base die, and the specifications arrive with the talk.