Test report DSG-6623 · Rev B · tested October 13, 2026
Memory & StorageDevice under test
Gelsinger Calls HBM 'Terrible Memory,' Warns of Data Center Defaults
Pat Gelsinger calls HBM 'terrible memory,' labels AI hardware a renaissance, and warns power shortages could trigger a wave of data center defaults.
- Read
- 3 min
- Words
- 654
- Node
- 45nm
- Operator
- Priya Raman
Spec summary
- Pat Gelsinger called HBM 'terrible memory' in remarks reported by BigGo Finance.
- Gelsinger described AI hardware as being in a renaissance.
- He warned power shortages could trigger a wave of data center defaults.
- Gelsinger served as Intel CEO until December 2024.

Pat Gelsinger has called high-bandwidth memory (HBM, the stacked DRAM used in AI accelerators) "terrible memory," while describing AI hardware as being in a renaissance, according to remarks reported by BigGo Finance. He paired that endorsement with a warning: power shortages could trigger a wave of data center defaults.
The three claims arrive together, and each deserves separate scrutiny. Gelsinger is no neutral observer. He is the former chief executive of Intel, the company he led until December 2024 and the one that has struggled most visibly to capture AI accelerator revenue against Nvidia.
What does 'terrible memory' actually mean?
HBM sits next to AI processors and feeds them data at high bandwidth. Its cost per bit is far higher than conventional DRAM, and its capacity per module remains limited. Calling it "terrible memory" is a statement about economics, not about engineering failure.
The critique is not new, but the source gives it weight. Gelsinger ran the company that once hoped to displace the HBM-plus-GPU pairing with its own silicon. That plan did not succeed on the scale Intel projected. Readers should weigh the claim accordingly.
Notably absent from the reported remarks: any figure quantifying HBM's cost premium, and any statement on whether Galsinger expects HBM demand to fall. The critique can be true and the demand curve can still rise. Both things have held for three consecutive years of AI buildout.
Is the AI hardware renaissance real?
Gelsinger's second claim is that AI hardware is in a renaissance. The framing suggests broad-based innovation across chips, interconnects and memory, rather than a single-vendor market.
The skeptical read is straightforward. A renaissance implies many winners. Current market data points to extreme concentration in one vendor's accelerator shipments and in one memory type, HBM, that Gelsinger himself calls terrible. Those two positions sit in tension, and the reported remarks do not resolve it.
What is not said matters here. Gelsinger does not appear to have named which companies, beyond general categories, will carry the renaissance. In a market where capital expenditure guidance from large operators runs to hundreds of billions of dollars over several years, unnamed beneficiaries are a common feature of optimistic industry talk.
Could power shortages trigger data center defaults?
The sharpest claim concerns electricity. Power shortages, Gelsinger said, could trigger a wave of data center defaults — facilities or operators unable to meet financial obligations because they cannot secure the electricity to run their equipment.
This moves the AI infrastructure debate from chip supply to grid supply. Data center operators have already faced multi-year waits for grid interconnection in several major markets. If power, not silicon, becomes the binding constraint, then projects financed on the assumption of available electricity may fail to generate revenue.
"Wave" is doing significant work in that sentence. One or two defaults would be market noise. A wave would reprice risk across the sector. The reported remarks do not specify a timeline, a geography, or a number of at-risk facilities. Every promise of grid relief now carries the caveat that transmission projects take years to build.
What should buyers and investors watch?
Three indicators will test Gelsinger's claims over the coming quarters:
- HBM pricing and contract terms from the three major suppliers, which will show whether the "terrible memory" economics are improving or worsening for buyers
- Grid interconnection queues and power purchase agreement volumes in major data center markets, the leading indicator for default risk
- Capital expenditure revisions from large operators, since cuts would signal that power constraints, not demand, are limiting growth
Gelsinger's combined message is coherent: build the hardware, doubt the memory economics, fear the electricity bill. Each element, however, is a claim about the future delivered without accompanying figures. The reported remarks offer direction, not evidence. Treat them as a hypothesis to be tested against quarterly data, not as a forecast with a track record.
via Google News: HBM memory (Source)
More from Priya Raman
Show full bio
Correspondent covering money, funding and market shifts around hardware layer of artificial intelligence at Die Signal.
303 articles
Same lot · LOT-C1C9
- DSG-646165nmHBM Prices Set to More Than Double Next Year, Report Says
- DSG-26367nmMicron Quarterly Results Nearly Quadruple on AI Demand Surge
- DSG-59533nmAnalysts: HBM Memory Cut Samsung Losses by 41% in a Year
- DSG-553465nmDeloitte: Memory chip crunch projected to last until 2029
- DSG-161214nmAI Demand for HBM Pushes Ordinary RAM Prices Above Cutting-Edge Chips